From: Takeshi Kihara Date: Mon, 9 Mar 2020 17:12:00 +0000 (+0100) Subject: arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=9aa7dea8d66e05bbb331eb214327f7d1b82d00ad;p=linux.git arm64: dts: renesas: r8a77990: Add CPUIdle support for CA53 cores Enable cpuidle (core shutdown) support for the CA53 cores on R-Car E3. Signed-off-by: Takeshi Kihara Signed-off-by: Geert Uytterhoeven Link: https://lore.kernel.org/r/20200309171200.21226-1-geert+renesas@glider.be --- diff --git a/arch/arm64/boot/dts/renesas/r8a77990.dtsi b/arch/arm64/boot/dts/renesas/r8a77990.dtsi index 0ad20b78e6eb6..1543f18e834f4 100644 --- a/arch/arm64/boot/dts/renesas/r8a77990.dtsi +++ b/arch/arm64/boot/dts/renesas/r8a77990.dtsi @@ -88,6 +88,7 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU0>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; dynamic-power-coefficient = <277>; clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; @@ -100,6 +101,7 @@ power-domains = <&sysc R8A77990_PD_CA53_CPU1>; next-level-cache = <&L2_CA53>; enable-method = "psci"; + cpu-idle-states = <&CPU_SLEEP_0>; clocks =<&cpg CPG_CORE R8A77990_CLK_Z2>; operating-points-v2 = <&cluster1_opp>; }; @@ -110,6 +112,19 @@ cache-unified; cache-level = <2>; }; + + idle-states { + entry-method = "psci"; + + CPU_SLEEP_0: cpu-sleep-0 { + compatible = "arm,idle-state"; + arm,psci-suspend-param = <0x0010000>; + local-timer-stop; + entry-latency-us = <700>; + exit-latency-us = <700>; + min-residency-us = <5000>; + }; + }; }; extal_clk: extal {