From: Ahmad Fatoum Date: Thu, 26 Mar 2020 22:02:06 +0000 (+0100) Subject: ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=9c32f980d999b4f441044f94005b3e649d036694;p=linux.git ARM: dts: stm32: preset stm32mp15x video #address- and #size-cells The cell count for address and size is defined by the binding and not something a board would change. Avoid each board adding this boilerplate by having the cell size specification in the SoC DTSI. Signed-off-by: Ahmad Fatoum Signed-off-by: Alexandre Torgue --- diff --git a/arch/arm/boot/dts/stm32mp151.dtsi b/arch/arm/boot/dts/stm32mp151.dtsi index 5260818543e52..d70fc774e0a40 100644 --- a/arch/arm/boot/dts/stm32mp151.dtsi +++ b/arch/arm/boot/dts/stm32mp151.dtsi @@ -1423,6 +1423,11 @@ clock-names = "lcd"; resets = <&rcc LTDC_R>; status = "disabled"; + + port { + #address-cells = <1>; + #size-cells = <0>; + }; }; iwdg2: watchdog@5a002000 { diff --git a/arch/arm/boot/dts/stm32mp157.dtsi b/arch/arm/boot/dts/stm32mp157.dtsi index 5e733cd16ff9e..54e73ccea4464 100644 --- a/arch/arm/boot/dts/stm32mp157.dtsi +++ b/arch/arm/boot/dts/stm32mp157.dtsi @@ -24,7 +24,14 @@ clock-names = "pclk", "ref", "px_clk"; resets = <&rcc DSI_R>; reset-names = "apb"; + #address-cells = <1>; + #size-cells = <0>; status = "disabled"; + + ports { + #address-cells = <1>; + #size-cells = <0>; + }; }; }; };