From: Edgar E. Iglesias <edgar.iglesias@gmail.com>
Date: Tue, 10 Jan 2012 09:33:37 +0000 (+0100)
Subject: microblaze: Break the tb at memory barriers
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=9f6113c7e65a98a88bb95ff5fd8679fbb28f18d6;p=qemu.git

microblaze: Break the tb at memory barriers

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@gmail.com>
---

diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c
index 180ac84f06..96ce2ece51 100644
--- a/target-microblaze/translate.c
+++ b/target-microblaze/translate.c
@@ -1249,12 +1249,22 @@ static void dec_bcc(DisasContext *dc)
 
 static void dec_br(DisasContext *dc)
 {
-    unsigned int dslot, link, abs;
+    unsigned int dslot, link, abs, mbar;
     int mem_index = cpu_mmu_index(dc->env);
 
     dslot = dc->ir & (1 << 20);
     abs = dc->ir & (1 << 19);
     link = dc->ir & (1 << 18);
+
+    /* Memory barrier.  */
+    mbar = (dc->ir >> 16) & 31;
+    if (mbar == 2 && dc->imm == 4) {
+        LOG_DIS("mbar %d\n", dc->rd);
+        /* Break the TB.  */
+        dc->cpustate_changed = 1;
+        return;
+    }
+
     LOG_DIS("br%s%s%s%s imm=%x\n",
              abs ? "a" : "", link ? "l" : "",
              dc->type_b ? "i" : "", dslot ? "d" : "",