From: Biju Das Date: Thu, 3 Mar 2022 16:41:52 +0000 (+0000) Subject: arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=a2b642d89e4beeddbfbd7be6108db2b7aaef78b6;p=linux.git arm64: dts: renesas: rzg2lc-smarc-pinfunction: Sort the nodes Sort the pinctrl nodes alphabetically. Signed-off-by: Biju Das Reviewed-by: Lad Prabhakar Link: https://lore.kernel.org/r/20220303164155.7706-2-biju.das.jz@bp.renesas.com Signed-off-by: Geert Uytterhoeven --- diff --git a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi index 5f5ec21e655c7..53759c3ddecbb 100644 --- a/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi +++ b/arch/arm64/boot/dts/renesas/rzg2lc-smarc-pinfunction.dtsi @@ -12,11 +12,6 @@ pinctrl-0 = <&sound_clk_pins>; pinctrl-names = "default"; - scif0_pins: scif0 { - pinmux = , /* TxD */ - ; /* RxD */ - }; - #if SW_SCIF_CAN /* SW8 should be at position 2->1 */ can1_pins: can1 { @@ -25,13 +20,6 @@ }; #endif - scif1_pins: scif1 { - pinmux = , /* TxD */ - , /* RxD */ - , /* CTS# */ - ; /* RTS# */ - }; - #if SW_RSPI_CAN /* SW8 should be at position 2->3 so that GPIO9_CAN1_STB line is activated */ can1-stb-hog { @@ -47,6 +35,18 @@ }; #endif + scif0_pins: scif0 { + pinmux = , /* TxD */ + ; /* RxD */ + }; + + scif1_pins: scif1 { + pinmux = , /* TxD */ + , /* RxD */ + , /* CTS# */ + ; /* RTS# */ + }; + sd1-pwr-en-hog { gpio-hog; gpios = ;