From: Mayuresh Chitale Date: Wed, 13 Sep 2023 16:39:00 +0000 (+0530) Subject: dt-bindings: riscv: Add smstateen entry X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=a4f5f39849f39f62f5d4e88cbb600f95f927003d;p=linux.git dt-bindings: riscv: Add smstateen entry Add an entry for the Smstateen extension to the riscv,isa-extensions property. Signed-off-by: Mayuresh Chitale Reviewed-by: Andrew Jones Reviewed-by: Conor Dooley Signed-off-by: Anup Patel --- diff --git a/Documentation/devicetree/bindings/riscv/extensions.yaml b/Documentation/devicetree/bindings/riscv/extensions.yaml index cc1f546fdbdcb..36ff6749fbbab 100644 --- a/Documentation/devicetree/bindings/riscv/extensions.yaml +++ b/Documentation/devicetree/bindings/riscv/extensions.yaml @@ -128,6 +128,12 @@ properties: changes to interrupts as frozen at commit ccbddab ("Merge pull request #42 from riscv/jhauser-2023-RC4") of riscv-aia. + - const: smstateen + description: | + The standard Smstateen extension for controlling access to CSRs + added by other RISC-V extensions in H/S/VS/U/VU modes and as + ratified at commit a28bfae (Ratified (#7)) of riscv-state-enable. + - const: ssaia description: | The standard Ssaia supervisor-level extension for the advanced