From: Nancy.Lin Date: Mon, 20 Jun 2022 09:19:23 +0000 (+0800) Subject: drm/mediatek: Add display merge async reset control X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=aaf94f7c3ae6b86135ada5bdb01bce5242b27175;p=linux.git drm/mediatek: Add display merge async reset control Add merge async reset control in mtk_merge_stop. Async hw doesn't do self reset on each sof signal(start of frame), so need to reset the async to clear the hw status for the next merge start. Signed-off-by: Nancy.Lin Reviewed-by: AngeloGioacchino Del Regno Tested-by: AngeloGioacchino Del Regno Tested-by: Bo-Chen Chen Link: https://patchwork.kernel.org/project/linux-mediatek/patch/20220620091930.27797-8-nancy.lin@mediatek.com/ Signed-off-by: Chun-Kuang Hu --- diff --git a/drivers/gpu/drm/mediatek/mtk_disp_merge.c b/drivers/gpu/drm/mediatek/mtk_disp_merge.c index 2e13d2fb429e7..6428b6203ffe8 100644 --- a/drivers/gpu/drm/mediatek/mtk_disp_merge.c +++ b/drivers/gpu/drm/mediatek/mtk_disp_merge.c @@ -8,6 +8,7 @@ #include #include #include +#include #include #include "mtk_drm_ddp_comp.h" @@ -67,6 +68,7 @@ struct mtk_disp_merge { struct cmdq_client_reg cmdq_reg; bool fifo_en; bool mute_support; + struct reset_control *reset_ctl; }; void mtk_merge_start(struct device *dev) @@ -101,6 +103,9 @@ void mtk_merge_stop_cmdq(struct device *dev, struct cmdq_pkt *cmdq_pkt) mtk_ddp_write(cmdq_pkt, 0, &priv->cmdq_reg, priv->regs, DISP_REG_MERGE_CTRL); + + if (priv->async_clk) + reset_control_reset(priv->reset_ctl); } static void mtk_merge_fifo_setting(struct mtk_disp_merge *priv, @@ -264,6 +269,12 @@ static int mtk_disp_merge_probe(struct platform_device *pdev) return PTR_ERR(priv->async_clk); } + if (priv->async_clk) { + priv->reset_ctl = devm_reset_control_get_optional_exclusive(dev, NULL); + if (IS_ERR(priv->reset_ctl)) + return PTR_ERR(priv->reset_ctl); + } + #if IS_REACHABLE(CONFIG_MTK_CMDQ) ret = cmdq_dev_get_client_reg(dev, &priv->cmdq_reg, 0); if (ret)