From: Martin K. Petersen Date: Thu, 14 Dec 2023 04:08:18 +0000 (-0500) Subject: Merge patch series "scsi: ufs: qcom: Code cleanups" X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=ae6fd54e605761259d13b4abbee5557f096b0413;p=linux.git Merge patch series "scsi: ufs: qcom: Code cleanups" Manivannan Sadhasivam says: Hello, This series has code some cleanups to the Qcom UFS driver. No functional change. In this version, I've removed code supporting legacy controllers ver < 2.0, as the respective platforms were never supported in upstream. Tested on: RB5 development board based on Qcom SM8250 SoC. Link: https://lore.kernel.org/r/20231208065902.11006-1-manivannan.sadhasivam@linaro.org Signed-off-by: Martin K. Petersen --- ae6fd54e605761259d13b4abbee5557f096b0413 diff --cc drivers/ufs/host/ufs-qcom.c index 968a4c00b5ecd,549a086453918..d5cca5d3a98f6 --- a/drivers/ufs/host/ufs-qcom.c +++ b/drivers/ufs/host/ufs-qcom.c @@@ -1062,58 -827,8 +838,56 @@@ static void ufs_qcom_advertise_quirks(s hba->quirks |= UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH; } +static void ufs_qcom_set_phy_gear(struct ufs_qcom_host *host) +{ + struct ufs_host_params *host_params = &host->host_params; + u32 val, dev_major; + + host->phy_gear = host_params->hs_tx_gear; + + if (host->hw_ver.major < 0x4) { + /* + * For controllers whose major HW version is < 4, power up the + * PHY using minimum supported gear (UFS_HS_G2). Switching to + * max gear will be performed during reinit if supported. + * For newer controllers, whose major HW version is >= 4, power + * up the PHY using max supported gear. + */ + host->phy_gear = UFS_HS_G2; + } else if (host->hw_ver.major >= 0x5) { + val = ufshcd_readl(host->hba, REG_UFS_DEBUG_SPARE_CFG); + dev_major = FIELD_GET(UFS_DEV_VER_MAJOR_MASK, val); + + /* + * Since the UFS device version is populated, let's remove the + * REINIT quirk as the negotiated gear won't change during boot. + * So there is no need to do reinit. + */ + if (dev_major != 0x0) + host->hba->quirks &= ~UFSHCD_QUIRK_REINIT_AFTER_MAX_GEAR_SWITCH; + + /* + * For UFS 3.1 device and older, power up the PHY using HS-G4 + * PHY gear to save power. + */ + if (dev_major > 0x0 && dev_major < 0x4) + host->phy_gear = UFS_HS_G4; + } +} + +static void ufs_qcom_set_host_params(struct ufs_hba *hba) +{ + struct ufs_qcom_host *host = ufshcd_get_variant(hba); + struct ufs_host_params *host_params = &host->host_params; + + ufshcd_init_host_params(host_params); + + /* This driver only supports symmetic gear setting i.e., hs_tx_gear == hs_rx_gear */ + host_params->hs_tx_gear = host_params->hs_rx_gear = ufs_qcom_get_hs_gear(hba); +} + static void ufs_qcom_set_caps(struct ufs_hba *hba) { - struct ufs_qcom_host *host = ufshcd_get_variant(hba); - hba->caps |= UFSHCD_CAP_CLK_GATING | UFSHCD_CAP_HIBERN8_WITH_CLK_GATING; hba->caps |= UFSHCD_CAP_CLK_SCALING | UFSHCD_CAP_WB_WITH_CLK_SCALING; hba->caps |= UFSHCD_CAP_AUTO_BKOPS_SUSPEND; diff --cc drivers/ufs/host/ufs-qcom.h index 32e51d90e8e70,cdceeb795e70a..9026fe2433075 --- a/drivers/ufs/host/ufs-qcom.h +++ b/drivers/ufs/host/ufs-qcom.h @@@ -22,12 -19,8 +19,9 @@@ #define UFS_HW_VER_MAJOR_MASK GENMASK(31, 28) #define UFS_HW_VER_MINOR_MASK GENMASK(27, 16) #define UFS_HW_VER_STEP_MASK GENMASK(15, 0) - +#define UFS_DEV_VER_MAJOR_MASK GENMASK(7, 4) - /* vendor specific pre-defined parameters */ - #define SLOW 1 - #define FAST 2 + #define UFS_QCOM_LIMIT_HS_RATE PA_HS_MODE_B /* QCOM UFS host controller vendor specific registers */ enum {