From: Geert Uytterhoeven Date: Fri, 7 Oct 2022 13:10:03 +0000 (+0200) Subject: clk: renesas: r8a779g0: Add PWM clock X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b00bf771ab4ae68ffbb111c2004e98a726c126c4;p=linux.git clk: renesas: r8a779g0: Add PWM clock Add the module clock used by the PWM timers on the Renesas R-Car V4H (R8A779G0) SoC. Signed-off-by: Geert Uytterhoeven Reviewed-by: Wolfram Sang Acked-by: Stephen Boyd Link: https://lore.kernel.org/r/a33d0e51c2fe8a0e6c89f3fd92db7c4bf5c33074.1665147497.git.geert+renesas@glider.be --- diff --git a/drivers/clk/renesas/r8a779g0-cpg-mssr.c b/drivers/clk/renesas/r8a779g0-cpg-mssr.c index c8c143c31b2be..1215b6f516ea4 100644 --- a/drivers/clk/renesas/r8a779g0-cpg-mssr.c +++ b/drivers/clk/renesas/r8a779g0-cpg-mssr.c @@ -175,6 +175,7 @@ static const struct mssr_mod_clk r8a779g0_mod_clks[] __initconst = { DEF_MOD("msi3", 621, R8A779G0_CLK_MSO), DEF_MOD("msi4", 622, R8A779G0_CLK_MSO), DEF_MOD("msi5", 623, R8A779G0_CLK_MSO), + DEF_MOD("pwm", 628, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("scif0", 702, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("scif1", 703, R8A779G0_CLK_SASYNCPERD4), DEF_MOD("scif3", 704, R8A779G0_CLK_SASYNCPERD4),