From: Danny Lin Date: Tue, 5 Jan 2021 20:10:00 +0000 (-0800) Subject: arm64: dts: qcom: sm8150: Add support for deep CPU cluster idle X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b2e3f897684ccc03139c8455e17abcc27bb5d491;p=linux.git arm64: dts: qcom: sm8150: Add support for deep CPU cluster idle This commit adds support for deep idling of the entire unified DynamIQ CPU cluster on sm8150. In this idle state, the LLCC (Last-Level Cache Controller) is powered off and the AOP (Always-On Processor) enters a low-power sleep state. I'm not sure what the per-CPU 0x400000f4 idle state previously contributed by Qualcomm as the "cluster sleep" state is, but the downstream kernel has no such state. The real deep cluster idle state is 0x41000c244, composed of: Cluster idle state: (0xc24) << 4 = 0xc240 Is reset state: 1 << 30 = 0x40000000 Affinity level: 1 << 24 = 0x1000000 CPU idle state: 0x4 (power collapse) This setup can be replicated with the PSCI power domain cpuidle driver, which utilizes OSI to enter cluster idle when the last active CPU enters idle. The cluster idle state cannot be used as a plain cpuidle state because it requires that all CPUs in the cluster are idling. Reviewed-by: Ulf Hansson Signed-off-by: Danny Lin Link: https://lore.kernel.org/r/20210105201000.913183-1-danny@kdrag0n.dev Signed-off-by: Bjorn Andersson --- diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 84d3c8a0b7f1c..9a939c6095ea4 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -49,10 +49,10 @@ enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_0>; qcom,freq-domain = <&cpufreq_hw 0>; + power-domains = <&CPU_PD0>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_0: l2-cache { compatible = "cache"; @@ -70,10 +70,10 @@ enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_100>; qcom,freq-domain = <&cpufreq_hw 0>; + power-domains = <&CPU_PD1>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_100: l2-cache { compatible = "cache"; @@ -89,10 +89,10 @@ enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_200>; qcom,freq-domain = <&cpufreq_hw 0>; + power-domains = <&CPU_PD2>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_200: l2-cache { compatible = "cache"; @@ -107,10 +107,10 @@ enable-method = "psci"; capacity-dmips-mhz = <488>; dynamic-power-coefficient = <232>; - cpu-idle-states = <&LITTLE_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_300>; qcom,freq-domain = <&cpufreq_hw 0>; + power-domains = <&CPU_PD3>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_300: l2-cache { compatible = "cache"; @@ -125,10 +125,10 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; - cpu-idle-states = <&BIG_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_400>; qcom,freq-domain = <&cpufreq_hw 1>; + power-domains = <&CPU_PD4>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_400: l2-cache { compatible = "cache"; @@ -143,10 +143,10 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; - cpu-idle-states = <&BIG_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_500>; qcom,freq-domain = <&cpufreq_hw 1>; + power-domains = <&CPU_PD5>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_500: l2-cache { compatible = "cache"; @@ -161,10 +161,10 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <369>; - cpu-idle-states = <&BIG_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_600>; qcom,freq-domain = <&cpufreq_hw 1>; + power-domains = <&CPU_PD6>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_600: l2-cache { compatible = "cache"; @@ -179,10 +179,10 @@ enable-method = "psci"; capacity-dmips-mhz = <1024>; dynamic-power-coefficient = <421>; - cpu-idle-states = <&BIG_CPU_SLEEP_0 - &CLUSTER_SLEEP_0>; next-level-cache = <&L2_700>; qcom,freq-domain = <&cpufreq_hw 2>; + power-domains = <&CPU_PD7>; + power-domain-names = "psci"; #cooling-cells = <2>; L2_700: l2-cache { compatible = "cache"; @@ -248,11 +248,13 @@ min-residency-us = <4488>; local-timer-stop; }; + }; + domain-idle-states { CLUSTER_SLEEP_0: cluster-sleep-0 { - compatible = "arm,idle-state"; + compatible = "domain-idle-state"; idle-state-name = "cluster-power-collapse"; - arm,psci-suspend-param = <0x400000F4>; + arm,psci-suspend-param = <0x4100c244>; entry-latency-us = <3263>; exit-latency-us = <6562>; min-residency-us = <9987>; @@ -288,6 +290,59 @@ psci { compatible = "arm,psci-1.0"; method = "smc"; + + CPU_PD0: cpu0 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + }; + + CPU_PD1: cpu1 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + }; + + CPU_PD2: cpu2 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + }; + + CPU_PD3: cpu3 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&LITTLE_CPU_SLEEP_0>; + }; + + CPU_PD4: cpu4 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&BIG_CPU_SLEEP_0>; + }; + + CPU_PD5: cpu5 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&BIG_CPU_SLEEP_0>; + }; + + CPU_PD6: cpu6 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&BIG_CPU_SLEEP_0>; + }; + + CPU_PD7: cpu7 { + #power-domain-cells = <0>; + power-domains = <&CLUSTER_PD>; + domain-idle-states = <&BIG_CPU_SLEEP_0>; + }; + + CLUSTER_PD: cpu-cluster0 { + #power-domain-cells = <0>; + domain-idle-states = <&CLUSTER_SLEEP_0>; + }; }; reserved-memory {