From: Dmitry Osipenko Date: Tue, 14 Jan 2020 01:34:42 +0000 (+0300) Subject: i2c: tegra: Check DMA completion status in addition to left time X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b3ec946975737b949137fbb1a2db9e7cc5b9ae82;p=linux.git i2c: tegra: Check DMA completion status in addition to left time It is more robust to check completion status in addition to the left time in a case of DMA transfer because transfer's completion happens in two phases [one is ISR, other is tasklet] and thus it is possible that DMA is completed while I2C completion awaiting times out because of the deferred notification done by the DMA driver. The DMA completion status becomes 100% actual after DMA synchronization. This fixes spurious DMA timeouts when system is under load. Tested-by: Thierry Reding Signed-off-by: Dmitry Osipenko Signed-off-by: Wolfram Sang --- diff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c index 3c7c86d4b0e4b..cbc2ad49043e4 100644 --- a/drivers/i2c/busses/i2c-tegra.c +++ b/drivers/i2c/busses/i2c-tegra.c @@ -1224,7 +1224,7 @@ static int tegra_i2c_xfer_msg(struct tegra_i2c_dev *i2c_dev, i2c_dev->rx_dma_chan : i2c_dev->tx_dma_chan); - if (time_left == 0) { + if (!time_left && !completion_done(&i2c_dev->dma_complete)) { dev_err(i2c_dev->dev, "DMA transfer timeout\n"); tegra_i2c_init(i2c_dev, true); return -ETIMEDOUT;