From: Kathiravan T Date: Fri, 19 May 2023 13:38:42 +0000 (+0530) Subject: arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b59cd2902c58969230a8aca67a10ac3fbde0af15;p=linux.git arm64: dts: qcom: ipq5332: rename mi01.2 dts to rdp441 To align with ipq5332-rdp468.dts, lets rename the mi01.2 dts as well to ipq5332-rdp441.dts. Reviewed-by: Konrad Dybcio Signed-off-by: Kathiravan T Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230519133844.23512-2-quic_kathirav@quicinc.com --- diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile index 354a9734c04bd..c1573bba67292 100644 --- a/arch/arm64/boot/dts/qcom/Makefile +++ b/arch/arm64/boot/dts/qcom/Makefile @@ -4,7 +4,7 @@ dtb-$(CONFIG_ARCH_QCOM) += apq8039-t2.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8094-sony-xperia-kitakami-karin_windy.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-db820c.dtb dtb-$(CONFIG_ARCH_QCOM) += apq8096-ifc6640.dtb -dtb-$(CONFIG_ARCH_QCOM) += ipq5332-mi01.2.dtb +dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp441.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp442.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp468.dtb dtb-$(CONFIG_ARCH_QCOM) += ipq5332-rdp474.dtb diff --git a/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts b/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts deleted file mode 100644 index 3af1d5556950f..0000000000000 --- a/arch/arm64/boot/dts/qcom/ipq5332-mi01.2.dts +++ /dev/null @@ -1,89 +0,0 @@ -// SPDX-License-Identifier: BSD-3-Clause -/* - * IPQ5332 AP-MI01.2 board device tree source - * - * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. - */ - -/dts-v1/; - -#include "ipq5332.dtsi" - -/ { - model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2"; - compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332"; - - aliases { - serial0 = &blsp1_uart0; - }; - - chosen { - stdout-path = "serial0"; - }; -}; - -&blsp1_uart0 { - pinctrl-0 = <&serial_0_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&blsp1_i2c1 { - clock-frequency = <400000>; - pinctrl-0 = <&i2c_1_pins>; - pinctrl-names = "default"; - status = "okay"; -}; - -&sdhc { - bus-width = <4>; - max-frequency = <192000000>; - mmc-ddr-1_8v; - mmc-hs200-1_8v; - non-removable; - pinctrl-0 = <&sdc_default_state>; - pinctrl-names = "default"; - status = "okay"; -}; - -&sleep_clk { - clock-frequency = <32000>; -}; - -&xo_board { - clock-frequency = <24000000>; -}; - -/* PINCTRL */ - -&tlmm { - i2c_1_pins: i2c-1-state { - pins = "gpio29", "gpio30"; - function = "blsp1_i2c0"; - drive-strength = <8>; - bias-pull-up; - }; - - sdc_default_state: sdc-default-state { - clk-pins { - pins = "gpio13"; - function = "sdc_clk"; - drive-strength = <8>; - bias-disable; - }; - - cmd-pins { - pins = "gpio12"; - function = "sdc_cmd"; - drive-strength = <8>; - bias-pull-up; - }; - - data-pins { - pins = "gpio8", "gpio9", "gpio10", "gpio11"; - function = "sdc_data"; - drive-strength = <8>; - bias-pull-up; - }; - }; -}; diff --git a/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts new file mode 100644 index 0000000000000..3af1d5556950f --- /dev/null +++ b/arch/arm64/boot/dts/qcom/ipq5332-rdp441.dts @@ -0,0 +1,89 @@ +// SPDX-License-Identifier: BSD-3-Clause +/* + * IPQ5332 AP-MI01.2 board device tree source + * + * Copyright (c) 2022-2023 Qualcomm Innovation Center, Inc. All rights reserved. + */ + +/dts-v1/; + +#include "ipq5332.dtsi" + +/ { + model = "Qualcomm Technologies, Inc. IPQ5332 MI01.2"; + compatible = "qcom,ipq5332-ap-mi01.2", "qcom,ipq5332"; + + aliases { + serial0 = &blsp1_uart0; + }; + + chosen { + stdout-path = "serial0"; + }; +}; + +&blsp1_uart0 { + pinctrl-0 = <&serial_0_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&blsp1_i2c1 { + clock-frequency = <400000>; + pinctrl-0 = <&i2c_1_pins>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sdhc { + bus-width = <4>; + max-frequency = <192000000>; + mmc-ddr-1_8v; + mmc-hs200-1_8v; + non-removable; + pinctrl-0 = <&sdc_default_state>; + pinctrl-names = "default"; + status = "okay"; +}; + +&sleep_clk { + clock-frequency = <32000>; +}; + +&xo_board { + clock-frequency = <24000000>; +}; + +/* PINCTRL */ + +&tlmm { + i2c_1_pins: i2c-1-state { + pins = "gpio29", "gpio30"; + function = "blsp1_i2c0"; + drive-strength = <8>; + bias-pull-up; + }; + + sdc_default_state: sdc-default-state { + clk-pins { + pins = "gpio13"; + function = "sdc_clk"; + drive-strength = <8>; + bias-disable; + }; + + cmd-pins { + pins = "gpio12"; + function = "sdc_cmd"; + drive-strength = <8>; + bias-pull-up; + }; + + data-pins { + pins = "gpio8", "gpio9", "gpio10", "gpio11"; + function = "sdc_data"; + drive-strength = <8>; + bias-pull-up; + }; + }; +};