From: Philippe Mathieu-Daudé <f4bug@amsat.org>
Date: Sun, 14 Feb 2021 17:58:35 +0000 (+0100)
Subject: target/mips: Rename 128-bit upper halve GPR registers
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b5b63d43a0d2b3c3a914a30b0443ce3f04c0db5c;p=qemu.git

target/mips: Rename 128-bit upper halve GPR registers

TCG displays the upper halve registers with the same name
as their lower halves. Rename the upper halves with the
'[hi]' suffix.

Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210214175912.732946-6-f4bug@amsat.org>
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
---

diff --git a/target/mips/translate.c b/target/mips/translate.c
index 2df7659247..5228e04084 100644
--- a/target/mips/translate.c
+++ b/target/mips/translate.c
@@ -29289,10 +29289,12 @@ void mips_tcg_init(void)
     cpu_gpr_hi[0] = NULL;
 
     for (unsigned i = 1; i < 32; i++) {
+        g_autofree char *rname = g_strdup_printf("%s[hi]", regnames[i]);
+
         cpu_gpr_hi[i] = tcg_global_mem_new_i64(cpu_env,
                                                offsetof(CPUMIPSState,
                                                         active_tc.gpr_hi[i]),
-                                               regnames[i]);
+                                               rname);
     }
 #endif /* !TARGET_MIPS64 */
     for (i = 0; i < 32; i++) {