From: aurel32 <aurel32@c046a42c-6fe2-441c-8c8c-71466251a162>
Date: Thu, 21 Aug 2008 03:14:41 +0000 (+0000)
Subject: De-assert ISA PIC IRQs properly
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b614106a170f77fc83ce9eb3ab0eb88379ee7161;p=qemu.git

De-assert ISA PIC IRQs properly

[ Taking latest isapc changes into account. ]

In case the PIC IRQ gets de-asserted on an isapc machine, we also have
to reset CPU_INTERRUPT_HARD. This is what older qemu (before the
routing-through-APIC changes) used to do as well.

Signed-off-by: Jan Kiszka <jan.kiszka@siemens.com>
Signed-off-by: Aurelien Jarno <aurelien@aurel32.net>

git-svn-id: svn://svn.savannah.nongnu.org/qemu/trunk@5040 c046a42c-6fe2-441c-8c8c-71466251a162
---

diff --git a/hw/pc.c b/hw/pc.c
index f20944afee..08e0fb6cae 100644
--- a/hw/pc.c
+++ b/hw/pc.c
@@ -118,17 +118,19 @@ static void pic_irq_request(void *opaque, int irq, int level)
 {
     CPUState *env = first_cpu;
 
-    if (!level)
-        return;
-
     if (env->apic_state) {
+        if (!level)
+            return;
         while (env) {
             if (apic_accept_pic_intr(env))
                 apic_local_deliver(env, APIC_LINT0);
             env = env->next_cpu;
         }
     } else {
-        cpu_interrupt(env, CPU_INTERRUPT_HARD);
+        if (level)
+            cpu_interrupt(env, CPU_INTERRUPT_HARD);
+        else
+            cpu_reset_interrupt(env, CPU_INTERRUPT_HARD);
     }
 }