From: Sander Vanheule <sander@svanheule.net>
Date: Sun, 15 Jan 2023 12:19:22 +0000 (+0100)
Subject: mips: Realtek RTL: select NO_EXCEPT_FILL
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b74cc639f796ecc0b43b23424ee33d9a56dfa468;p=linux.git

mips: Realtek RTL: select NO_EXCEPT_FILL

The CPUs in these SoCs support MIPS32 R2, and allow ebase relocation.
Even if the default exception base of 0x80000000 is used, the
MIPS_GENERIC load address of 0x80100000 leaves sufficient space to not
need an extra 0x400 bytes of padding.

Suggested-by: Olliver Schinagl <oliver@schinagl.nl>
Signed-off-by: Sander Vanheule <sander@svanheule.net>
Signed-off-by: Thomas Bogendoerfer <tsbogend@alpha.franken.de>
---

diff --git a/arch/mips/Kconfig b/arch/mips/Kconfig
index 15cb692b0a097..37072e15b2634 100644
--- a/arch/mips/Kconfig
+++ b/arch/mips/Kconfig
@@ -445,6 +445,7 @@ config LANTIQ
 	select IRQ_MIPS_CPU
 	select CEVT_R4K
 	select CSRC_R4K
+	select NO_EXCEPT_FILL
 	select SYS_HAS_CPU_MIPS32_R1
 	select SYS_HAS_CPU_MIPS32_R2
 	select SYS_SUPPORTS_BIG_ENDIAN