From: Jonathan Cameron Date: Sun, 8 May 2022 17:56:44 +0000 (+0100) Subject: iio: dac: ti-dac7612: Fix alignment for DMA safety X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=b9ac08b3282a95fcefb057c2886028a6807725d8;p=linux.git iio: dac: ti-dac7612: Fix alignment for DMA safety ____cacheline_aligned is an insufficient guarantee for non-coherent DMA on platforms with 128 byte cachelines above L1. Switch to the updated IIO_DMA_MINALIGN definition. Updated help text to 'may' require buffers to be in their own cacheline. Fixes: 977724d20584 ("iio:dac:ti-dac7612: Add driver for Texas Instruments DAC7612") Signed-off-by: Jonathan Cameron Cc: Ricardo Ribalda Acked-by: Nuno Sá Link: https://lore.kernel.org/r/20220508175712.647246-65-jic23@kernel.org --- diff --git a/drivers/iio/dac/ti-dac7612.c b/drivers/iio/dac/ti-dac7612.c index 4c0f4b5e9ff44..8195815de26fe 100644 --- a/drivers/iio/dac/ti-dac7612.c +++ b/drivers/iio/dac/ti-dac7612.c @@ -31,10 +31,10 @@ struct dac7612 { struct mutex lock; /* - * DMA (thus cache coherency maintenance) requires the + * DMA (thus cache coherency maintenance) may require the * transfer buffers to live in their own cache lines. */ - uint8_t data[2] ____cacheline_aligned; + uint8_t data[2] __aligned(IIO_DMA_MINALIGN); }; static int dac7612_cmd_single(struct dac7612 *priv, int channel, u16 val)