From: Dave Airlie Date: Thu, 27 Sep 2018 01:06:46 +0000 (+1000) Subject: BackMerge v4.19-rc5 into drm-next X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=bf78296ab1cb215d0609ac6cff4e43e941e51265;p=linux.git BackMerge v4.19-rc5 into drm-next Sean Paul requested an -rc5 backmerge from some sun4i fixes. Signed-off-by: Dave Airlie --- bf78296ab1cb215d0609ac6cff4e43e941e51265 diff --cc drivers/gpu/drm/i915/gvt/handlers.c index d26258786e3ff,94c1089ecf59e..90f50f67909a0 --- a/drivers/gpu/drm/i915/gvt/handlers.c +++ b/drivers/gpu/drm/i915/gvt/handlers.c @@@ -2798,9 -2823,16 +2817,11 @@@ static int init_skl_mmio_info(struct in MMIO_F(_MMIO(_DPD_AUX_CH_CTL), 6 * 4, 0, 0, 0, D_SKL_PLUS, NULL, dp_aux_ch_ctl_mmio_write); - /* - * Use an arbitrary power well controlled by the PWR_WELL_CTL - * register. - */ - MMIO_D(HSW_PWR_WELL_CTL_BIOS(SKL_DISP_PW_MISC_IO), D_SKL_PLUS); - MMIO_DH(HSW_PWR_WELL_CTL_DRIVER(SKL_DISP_PW_MISC_IO), D_SKL_PLUS, NULL, - skl_power_well_ctl_write); + MMIO_D(HSW_PWR_WELL_CTL1, D_SKL_PLUS); + MMIO_DH(HSW_PWR_WELL_CTL2, D_SKL_PLUS, NULL, skl_power_well_ctl_write); + MMIO_DH(DBUF_CTL, D_SKL_PLUS, NULL, gen9_dbuf_ctl_mmio_write); + MMIO_D(_MMIO(0xa210), D_SKL_PLUS); MMIO_D(GEN9_MEDIA_PG_IDLE_HYSTERESIS, D_SKL_PLUS); MMIO_D(GEN9_RENDER_PG_IDLE_HYSTERESIS, D_SKL_PLUS); diff --cc drivers/gpu/drm/sun4i/sun4i_drv.c index 1e41c3f5fd6d1,8b0cd08034e0c..9027ddde4262c --- a/drivers/gpu/drm/sun4i/sun4i_drv.c +++ b/drivers/gpu/drm/sun4i/sun4i_drv.c @@@ -402,10 -418,8 +402,9 @@@ static const struct of_device_id sun4i_ { .compatible = "allwinner,sun8i-a33-display-engine" }, { .compatible = "allwinner,sun8i-a83t-display-engine" }, { .compatible = "allwinner,sun8i-h3-display-engine" }, - { .compatible = "allwinner,sun8i-r40-display-engine" }, { .compatible = "allwinner,sun8i-v3s-display-engine" }, { .compatible = "allwinner,sun9i-a80-display-engine" }, + { .compatible = "allwinner,sun50i-a64-display-engine" }, { } }; MODULE_DEVICE_TABLE(of, sun4i_drv_of_table);