From: Anshuman Khandual <anshuman.khandual@arm.com>
Date: Wed, 2 Aug 2023 06:36:58 +0000 (+0530)
Subject: coresight: trbe: Directly use ID_AA64DFR0_EL1_TraceBuffer_IMP
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c00701125cf379f8ce9a4c98cb3cbf9edc3a5672;p=linux.git

coresight: trbe: Directly use ID_AA64DFR0_EL1_TraceBuffer_IMP

is_trbe_available() checks for the TRBE support via extracting TraceBuffer
field value from ID_AA64DFR0_EL1, and ensures that it is implemented. This
replaces the open encoding '0b0001' with 'ID_AA64DFR0_EL1_TraceBuffer_IMP'
which is now available via sysreg tools. Functional change is not intended.

Cc: Suzuki K Poulose <suzuki.poulose@arm.com>
Cc: Mike Leach <mike.leach@linaro.org>
Cc: James Clark <james.clark@arm.com>
Cc: Leo Yan <leo.yan@linaro.org>
Cc: coresight@lists.linaro.org
Cc: linux-arm-kernel@lists.infradead.org
Cc: linux-kernel@vger.kernel.org
Signed-off-by: Anshuman Khandual <anshuman.khandual@arm.com>
Reviewed-by: James Clark <james.clark@arm.com>
Signed-off-by: Suzuki K Poulose <suzuki.poulose@arm.com>
Link: https://lore.kernel.org/r/20230802063658.1069813-1-anshuman.khandual@arm.com
---

diff --git a/drivers/hwtracing/coresight/coresight-trbe.h b/drivers/hwtracing/coresight/coresight-trbe.h
index 77cbb5c638783..e915e749be551 100644
--- a/drivers/hwtracing/coresight/coresight-trbe.h
+++ b/drivers/hwtracing/coresight/coresight-trbe.h
@@ -23,7 +23,7 @@ static inline bool is_trbe_available(void)
 	unsigned int trbe = cpuid_feature_extract_unsigned_field(aa64dfr0,
 								 ID_AA64DFR0_EL1_TraceBuffer_SHIFT);
 
-	return trbe >= 0b0001;
+	return trbe >= ID_AA64DFR0_EL1_TraceBuffer_IMP;
 }
 
 static inline bool is_trbe_enabled(void)