From: Marc Gonzalez Date: Mon, 25 Mar 2019 13:49:54 +0000 (+0100) Subject: clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c0ee0e43c049a13d11e913edf875e4ee376dc84b;p=linux.git clk: qcom: Skip halt checks on gcc_pcie_0_pipe_clk for 8998 See similar issue solved by commit 5f2420ed2189 ("clk: qcom: Skip halt checks on gcc_usb3_phy_pipe_clk for 8998") Without this patch, PCIe PHY init fails: qcom-qmp-phy 1c06000.phy: pipe_clk enable failed err=-16 phy phy-1c06000.phy.0: phy init failed --> -16 Signed-off-by: Marc Gonzalez Reviewed-by: Jeffrey Hugo Fixes: b5f5f525c547 ("clk: qcom: Add MSM8998 Global Clock Control (GCC) driver") Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/qcom/gcc-msm8998.c b/drivers/clk/qcom/gcc-msm8998.c index c240fba794c7a..033688264c7b7 100644 --- a/drivers/clk/qcom/gcc-msm8998.c +++ b/drivers/clk/qcom/gcc-msm8998.c @@ -2161,7 +2161,7 @@ static struct clk_branch gcc_pcie_0_mstr_axi_clk = { static struct clk_branch gcc_pcie_0_pipe_clk = { .halt_reg = 0x6b018, - .halt_check = BRANCH_HALT, + .halt_check = BRANCH_HALT_SKIP, .clkr = { .enable_reg = 0x6b018, .enable_mask = BIT(0),