From: Peter Maydell Date: Wed, 16 Feb 2022 09:57:11 +0000 (+0000) Subject: Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220216... X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c13b8e9973635f34f3ce4356af27a311c993729c;p=qemu.git Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20220216' into staging Fourth RISC-V PR for QEMU 7.0 * Remove old Ibex PLIC header file * Allow writing 8 bytes with generic loader * Fixes for RV128 * Refactor RISC-V CPU configs * Initial support for XVentanaCondOps custom extension * Fix for vill field in vtype * Fix trap cause for RV32 HS-mode CSR access from RV64 HS-mode * Support for svnapot, svinval and svpbmt extensions # gpg: Signature made Wed 16 Feb 2022 06:24:52 GMT # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis " [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054 * remotes/alistair/tags/pull-riscv-to-apply-20220216: (35 commits) docs/system: riscv: Update description of CPU target/riscv: add support for svpbmt extension target/riscv: add support for svinval extension target/riscv: add support for svnapot extension target/riscv: add PTE_A/PTE_D/PTE_U bits check for inner PTE target/riscv: Ignore reserved bits in PTE for RV64 hw/intc: Add RISC-V AIA APLIC device emulation target/riscv: Allow users to force enable AIA CSRs in HART hw/riscv: virt: Use AIA INTC compatible string when available target/riscv: Implement AIA IMSIC interface CSRs target/riscv: Implement AIA xiselect and xireg CSRs target/riscv: Implement AIA mtopi, stopi, and vstopi CSRs target/riscv: Implement AIA interrupt filtering CSRs target/riscv: Implement AIA hvictl and hviprioX CSRs target/riscv: Implement AIA CSRs for 64 local interrupts on RV32 target/riscv: Implement AIA local interrupt priorities target/riscv: Allow AIA device emulation to set ireg rmw callback target/riscv: Add defines for AIA CSRs target/riscv: Add AIA cpu feature target/riscv: Allow setting CPU feature from machine/device emulation ... Signed-off-by: Peter Maydell --- c13b8e9973635f34f3ce4356af27a311c993729c