From: Stanley Chu <stanley.chu@mediatek.com>
Date: Mon, 14 Sep 2020 05:00:52 +0000 (+0800)
Subject: scsi: ufs-mediatek: dt-bindings: Add mt8192-ufshci compatible string
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c1a3bf99d76e5ae5537265433def019a34a9dac0;p=linux.git

scsi: ufs-mediatek: dt-bindings: Add mt8192-ufshci compatible string

Add "mediatek,mt8192-ufshci" compatible string to for MediaTek UFS host
controller present on MT8192 chipsets.

Link: https://lore.kernel.org/r/20200914050052.3974-3-stanley.chu@mediatek.com
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>
---

diff --git a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
index 72aab8547308d..63a953b672d2f 100644
--- a/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
+++ b/Documentation/devicetree/bindings/ufs/ufs-mediatek.txt
@@ -9,7 +9,9 @@ contain a phandle reference to UFS M-PHY node.
 Required properties for UFS nodes:
 - compatible         : Compatible list, contains the following controller:
                        "mediatek,mt8183-ufshci" for MediaTek UFS host controller
-                       present on MT81xx chipsets.
+                       present on MT8183 chipsets.
+                       "mediatek,mt8192-ufshci" for MediaTek UFS host controller
+                       present on MT8192 chipsets.
 - reg                : Address and length of the UFS register set.
 - phys               : phandle to m-phy.
 - clocks             : List of phandle and clock specifier pairs.