From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 15 Apr 2014 18:18:49 +0000 (+0100)
Subject: target-arm: Make Cortex-A15 CBAR read-only
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c29f9a0a29e76b36fd1bb6f5adf7841c6fdbc0b3;p=qemu.git

target-arm: Make Cortex-A15 CBAR read-only

The Cortex-A15's CBAR register is actually read-only (unlike that
of the Cortex-A9). Correct our model to match the hardware.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Peter Crosthwaite <peter.crosthwaite@xilinx.com>
---

diff --git a/target-arm/cpu.c b/target-arm/cpu.c
index f9f61870b0..c0ddc3e3df 100644
--- a/target-arm/cpu.c
+++ b/target-arm/cpu.c
@@ -744,7 +744,7 @@ static void cortex_a15_initfn(Object *obj)
     set_feature(&cpu->env, ARM_FEATURE_ARM_DIV);
     set_feature(&cpu->env, ARM_FEATURE_GENERIC_TIMER);
     set_feature(&cpu->env, ARM_FEATURE_DUMMY_C15_REGS);
-    set_feature(&cpu->env, ARM_FEATURE_CBAR);
+    set_feature(&cpu->env, ARM_FEATURE_CBAR_RO);
     set_feature(&cpu->env, ARM_FEATURE_LPAE);
     cpu->kvm_target = QEMU_KVM_ARM_TARGET_CORTEX_A15;
     cpu->midr = 0x412fc0f1;