From: Nathan Froyd Date: Sat, 20 Feb 2010 18:19:09 +0000 (-0800) Subject: target-mips: fix CpU exception for coprocessor 0 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c2c65dab45bc640dc7a3d1fb259472b029bb420f;p=qemu.git target-mips: fix CpU exception for coprocessor 0 When we signal a CpU exception for coprocessor 0, we should indicate that it's for coprocessor 0 instead of coprocessor 1. Signed-off-by: Nathan Froyd Signed-off-by: Aurelien Jarno --- diff --git a/target-mips/translate.c b/target-mips/translate.c index 11944444ea..eb46b42ed1 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -830,7 +830,7 @@ static inline void gen_op_addr_add (DisasContext *ctx, TCGv ret, TCGv arg0, TCGv static inline void check_cp0_enabled(DisasContext *ctx) { if (unlikely(!(ctx->hflags & MIPS_HFLAG_CP0))) - generate_exception_err(ctx, EXCP_CpU, 1); + generate_exception_err(ctx, EXCP_CpU, 0); } static inline void check_cp1_enabled(DisasContext *ctx)