From: Charlene Liu <charlene.liu@amd.com>
Date: Fri, 3 Mar 2017 20:16:03 +0000 (-0500)
Subject: drm/amd/display: TPS4 logic typo fix
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c30267f5023aef44d4367c631c42f217a2ec37f6;p=linux.git

drm/amd/display: TPS4 logic typo fix

Signed-off-by: Charlene Liu <charlene.liu@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Reviewed-by: Wenjing Liu <Wenjing.Liu@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
index 37efa40a9bcae..80002795adc22 100644
--- a/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
+++ b/drivers/gpu/drm/amd/display/dc/core/dc_link_dp.c
@@ -921,8 +921,8 @@ static inline bool perform_link_training_int(
 	 * If the upstream DPTX and downstream DPRX both support TPS4,
 	 * TPS4 must be used instead of POST_LT_ADJ_REQ.
 	 */
-	if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 &&
-		get_supported_tp(link) == HW_DP_TRAINING_PATTERN_4)
+	if (link->dpcd_caps.max_ln_count.bits.POST_LT_ADJ_REQ_SUPPORTED != 1 ||
+			get_supported_tp(link) == HW_DP_TRAINING_PATTERN_4)
 		return status;
 
 	if (status &&