From: Manivannan Sadhasivam Date: Tue, 14 Mar 2023 08:04:36 +0000 (+0530) Subject: arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c5ccf8d33f11f57ef46d12db1dda4afcc4d5150b;p=linux.git arm64: dts: qcom: sm8150: Fix the base addresses of LLCC banks The LLCC block has several banks each with a different base address and holes in between. So it is not a correct approach to cover these banks with a single offset/size. Instead, the individual bank's base address needs to be specified in devicetree with the exact size. Reported-by: Parikshit Pareek Signed-off-by: Manivannan Sadhasivam Signed-off-by: Bjorn Andersson Link: https://lore.kernel.org/r/20230314080443.64635-8-manivannan.sadhasivam@linaro.org --- diff --git a/arch/arm64/boot/dts/qcom/sm8150.dtsi b/arch/arm64/boot/dts/qcom/sm8150.dtsi index 55aea7c05ed8a..d3e7df92998c2 100644 --- a/arch/arm64/boot/dts/qcom/sm8150.dtsi +++ b/arch/arm64/boot/dts/qcom/sm8150.dtsi @@ -1794,8 +1794,11 @@ system-cache-controller@9200000 { compatible = "qcom,sm8150-llcc"; - reg = <0 0x09200000 0 0x200000>, <0 0x09600000 0 0x50000>; - reg-names = "llcc_base", "llcc_broadcast_base"; + reg = <0 0x09200000 0 0x50000>, <0 0x09280000 0 0x50000>, + <0 0x09300000 0 0x50000>, <0 0x09380000 0 0x50000>, + <0 0x09600000 0 0x50000>; + reg-names = "llcc0_base", "llcc1_base", "llcc2_base", + "llcc3_base", "llcc_broadcast_base"; interrupts = ; };