From: Heiner Kallweit Date: Thu, 18 Apr 2024 18:29:21 +0000 (+0200) Subject: PCI: Annotate pci_cache_line_size variables as __ro_after_init X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c7ae396ec597b2f3644f90f5c7278674b0527aa9;p=linux.git PCI: Annotate pci_cache_line_size variables as __ro_after_init Annotate both variables as __ro_after_init, enforcing that they can't be changed after the init phase. Link: https://lore.kernel.org/r/52fd058d-6d72-48db-8e61-5fcddcd0aa51@gmail.com Signed-off-by: Heiner Kallweit Signed-off-by: Bjorn Helgaas --- diff --git a/drivers/pci/pci.c b/drivers/pci/pci.c index e5f243dd42884..9ee0d4e8808eb 100644 --- a/drivers/pci/pci.c +++ b/drivers/pci/pci.c @@ -142,8 +142,8 @@ enum pcie_bus_config_types pcie_bus_config = PCIE_BUS_DEFAULT; * the dfl or actual value as it sees fit. Don't forget this is * measured in 32-bit words, not bytes. */ -u8 pci_dfl_cache_line_size = L1_CACHE_BYTES >> 2; -u8 pci_cache_line_size; +u8 pci_dfl_cache_line_size __ro_after_init = L1_CACHE_BYTES >> 2; +u8 pci_cache_line_size __ro_after_init ; /* * If we set up a device for bus mastering, we need to check the latency