From: Ilya Leoshkevich Date: Mon, 7 Aug 2023 11:48:20 +0000 (+0200) Subject: target/s390x: Define TARGET_HAS_PRECISE_SMC X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c7f41e4f53c4763bf1e350723a560dc3bf46e04b;p=qemu.git target/s390x: Define TARGET_HAS_PRECISE_SMC PoP (Sequence of Storage References -> Instruction Fetching) says: ... if a store that is conceptually earlier is made by the same CPU using the same effective address as that by which the instruction is subse- quently fetched, the updated information is obtained ... QEMU already has support for this in the common code; enable it for s390x. Signed-off-by: Ilya Leoshkevich Message-Id: <20230807114921.438881-1-iii@linux.ibm.com> Acked-by: David Hildenbrand Signed-off-by: Thomas Huth --- diff --git a/target/s390x/cpu.h b/target/s390x/cpu.h index eb5b65b7d3..304029e57c 100644 --- a/target/s390x/cpu.h +++ b/target/s390x/cpu.h @@ -36,6 +36,8 @@ /* The z/Architecture has a strong memory model with some store-after-load re-ordering */ #define TCG_GUEST_DEFAULT_MO (TCG_MO_ALL & ~TCG_MO_ST_LD) +#define TARGET_HAS_PRECISE_SMC + #define TARGET_INSN_START_EXTRA_WORDS 2 #define MMU_USER_IDX 0