From: Richard Henderson <richard.henderson@linaro.org>
Date: Tue, 26 Mar 2019 12:53:26 +0000 (+0000)
Subject: target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c8877d0f2f662bf01346a03bc9fd279954b4132d;p=qemu.git

target/arm: Set SIMDMISC and FPMISC for 32-bit -cpu max

Fixes: https://bugs.launchpad.net/bugs/1821430
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20190325161338.6536-1-richard.henderson@linaro.org
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/target/arm/cpu.c b/target/arm/cpu.c
index 504a4771fb..4155782197 100644
--- a/target/arm/cpu.c
+++ b/target/arm/cpu.c
@@ -2028,6 +2028,11 @@ static void arm_max_initfn(Object *obj)
             t = FIELD_DP32(t, ID_ISAR6, SPECRES, 1);
             cpu->isar.id_isar6 = t;
 
+            t = cpu->isar.mvfr2;
+            t = FIELD_DP32(t, MVFR2, SIMDMISC, 3); /* SIMD MaxNum */
+            t = FIELD_DP32(t, MVFR2, FPMISC, 4);   /* FP MaxNum */
+            cpu->isar.mvfr2 = t;
+
             t = cpu->id_mmfr4;
             t = FIELD_DP32(t, ID_MMFR4, HPDS, 1); /* AA32HPD */
             cpu->id_mmfr4 = t;