From: Peter Maydell <peter.maydell@linaro.org>
Date: Tue, 22 Aug 2023 16:31:05 +0000 (+0100)
Subject: target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c986d860398ff44c32a612b3d8dfc9f89ffe5e52;p=qemu.git

target/arm/ptw: Don't set fi->s1ptw for UnsuppAtomicUpdate fault

For an Unsupported Atomic Update fault where the stage 1 translation
table descriptor update can't be done because it's to an unsupported
memory type, this is a stage 1 abort (per the Arm ARM R_VSXXT).  This
means we should not set fi->s1ptw, because this will cause the code
in the get_phys_addr_lpae() error-exit path to mark it as stage 2.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20230807141514.19075-2-peter.maydell@linaro.org
---

diff --git a/target/arm/ptw.c b/target/arm/ptw.c
index 8f94100c61..bafeb876ad 100644
--- a/target/arm/ptw.c
+++ b/target/arm/ptw.c
@@ -701,7 +701,6 @@ static uint64_t arm_casq_ptw(CPUARMState *env, uint64_t old_val,
 
     if (unlikely(!host)) {
         fi->type = ARMFault_UnsuppAtomicUpdate;
-        fi->s1ptw = true;
         return 0;
     }