From: Arınç ÜNAL Date: Mon, 5 Feb 2024 22:08:07 +0000 (+0300) Subject: net: dsa: mt7530: correct port capabilities of MT7988 X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=c9d70a1d3d64cf4bc5646f2dabe6879650033896;p=linux.git net: dsa: mt7530: correct port capabilities of MT7988 On the switch on the MT7988 SoC, as shown in Block Diagram 8.1.1.3 on page 125 of "MT7988A Wi-Fi 7 Generation Router Platform: Datasheet (Open Version) v0.1", there are only 4 PHYs. That's port 0 to 3. Set the case for ports which connect to switch PHYs to '0 ... 3'. Port 4 and 5 are not used at all in this design. Link: https://wiki.banana-pi.org/Banana_Pi_BPI-R4#Documents [1] Acked-by: Daniel Golle Reviewed-by: Vladimir Oltean Signed-off-by: Arınç ÜNAL Link: https://lore.kernel.org/r/20240206-for-netnext-mt7530-improvements-2-v5-6-d7d92a185cb1@arinc9.com Signed-off-by: Jakub Kicinski --- diff --git a/drivers/net/dsa/mt7530.c b/drivers/net/dsa/mt7530.c index b6ca373a7a504..6b29dec7c6bb4 100644 --- a/drivers/net/dsa/mt7530.c +++ b/drivers/net/dsa/mt7530.c @@ -2577,7 +2577,7 @@ static void mt7988_mac_port_get_caps(struct dsa_switch *ds, int port, switch (port) { /* Ports which are connected to switch PHYs. There is no MII pinout. */ - case 0 ... 4: + case 0 ... 3: __set_bit(PHY_INTERFACE_MODE_INTERNAL, config->supported_interfaces); break;