From: Ville Syrjälä Date: Wed, 14 Nov 2018 21:07:21 +0000 (+0200) Subject: drm/i915: Fix latency==0 handling for level 0 watermark on skl+ X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=ce110ec311e9feae0905c24078146a2adbca877e;p=linux.git drm/i915: Fix latency==0 handling for level 0 watermark on skl+ If the level 0 latency is 0 we can't do anything. Return an error rather than success. While this can't happen due to WaWmMemoryReadLatency, it can happen if the user clears out the level 0 latency via debugfs. v2: Clarify how how we can end here with zero level 0 latency (Matt) Cc: Matt Roper Reviewed-by: Rodrigo Vivi Signed-off-by: Ville Syrjälä Link: https://patchwork.freedesktop.org/patch/msgid/20181114210729.16185-6-ville.syrjala@linux.intel.com Reviewed-by: Matt Roper Reviewed-by: Maarten Lankhorst --- diff --git a/drivers/gpu/drm/i915/intel_pm.c b/drivers/gpu/drm/i915/intel_pm.c index 897a791662c59..d94de52a8a766 100644 --- a/drivers/gpu/drm/i915/intel_pm.c +++ b/drivers/gpu/drm/i915/intel_pm.c @@ -4743,8 +4743,10 @@ static int skl_compute_plane_wm(const struct drm_i915_private *dev_priv, bool apply_memory_bw_wa = skl_needs_memory_bw_wa(state); uint32_t min_disp_buf_needed; - if (latency == 0 || - !intel_wm_plane_visible(cstate, intel_pstate)) { + if (latency == 0) + return level == 0 ? -EINVAL : 0; + + if (!intel_wm_plane_visible(cstate, intel_pstate)) { result->plane_en = false; return 0; }