From: Vijay Kumar <vijaykumar@bravegnu.org>
Date: Fri, 21 Aug 2009 04:57:38 +0000 (+0530)
Subject: Check block driver read error in pflash_cfi0x
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=d0e7605ee0d91c3737052127a79199ddab3ff653;p=qemu.git

Check block driver read error in pflash_cfi0x

If a flash file of size smaller than the flash size is specified in
the -pflash option, the block driver returns error. But the
pflash_cfi0x ignores the error. This results in a flash content of all
zeroes. And the simulation aborts while executing code.

This patch adds the checks for errors from bdrv_read and escalates it
to the calling code.

Signed-off-by: Vijay Kumar B. <vijaykumar@bravegnu.org>
Signed-off-by: Anthony Liguori <aliguori@us.ibm.com>
---

diff --git a/hw/pflash_cfi01.c b/hw/pflash_cfi01.c
index 6dd39a659d..cef9ffb174 100644
--- a/hw/pflash_cfi01.c
+++ b/hw/pflash_cfi01.c
@@ -507,6 +507,7 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
 {
     pflash_t *pfl;
     target_phys_addr_t total_len;
+    int ret;
 
     total_len = sector_len * nb_blocs;
 
@@ -530,7 +531,12 @@ pflash_t *pflash_cfi01_register(target_phys_addr_t base, ram_addr_t off,
     pfl->bs = bs;
     if (pfl->bs) {
         /* read the initial flash content */
-        bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9);
+        ret = bdrv_read(pfl->bs, 0, pfl->storage, total_len >> 9);
+        if (ret < 0) {
+            cpu_unregister_io_memory(pfl->fl_mem);
+            qemu_free(pfl);
+            return NULL;
+        }
     }
 #if 0 /* XXX: there should be a bit to set up read-only,
        *      the same way the hardware does (with WP pin).
diff --git a/hw/pflash_cfi02.c b/hw/pflash_cfi02.c
index a97b9e6772..7f5094b3ed 100644
--- a/hw/pflash_cfi02.c
+++ b/hw/pflash_cfi02.c
@@ -547,6 +547,7 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
 {
     pflash_t *pfl;
     int32_t chip_len;
+    int ret;
 
     chip_len = sector_len * nb_blocs;
     /* XXX: to be fixed */
@@ -568,7 +569,12 @@ pflash_t *pflash_cfi02_register(target_phys_addr_t base, ram_addr_t off,
     pfl->bs = bs;
     if (pfl->bs) {
         /* read the initial flash content */
-        bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9);
+        ret = bdrv_read(pfl->bs, 0, pfl->storage, chip_len >> 9);
+        if (ret < 0) {
+            cpu_unregister_io_memory(pfl->fl_mem);
+            qemu_free(pfl);
+            return NULL;
+        }
     }
 #if 0 /* XXX: there should be a bit to set up read-only,
        *      the same way the hardware does (with WP pin).