From: Geert Uytterhoeven Date: Mon, 15 Jan 2024 11:03:05 +0000 (+0100) Subject: ARM: dts: renesas: r8a73a4: Fix thermal parent clock X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=d2339555c36a07ace3fdd5d7ad584072b3214ff6;p=linux.git ARM: dts: renesas: r8a73a4: Fix thermal parent clock According to Table 8.1, "Summary of Module Power, Reset condition and Clock assignment" of the R-Mobile APE6 Hardware Manual Rev. 0.7, the parent clock of the thermal sensor clock is the Common Peripheral (CP) clock, which runs at 13 MHz (main clock / 2). As the R-Car Thermal driver does not use the clock rate, this change has no functional impact. Signed-off-by: Geert Uytterhoeven Reviewed-by: Niklas Söderlund Link: https://lore.kernel.org/r/aac49d67d7a38230875543d49e84fcca587fb9e1.1705315614.git.geert+renesas@glider.be --- diff --git a/arch/arm/boot/dts/renesas/r8a73a4.dtsi b/arch/arm/boot/dts/renesas/r8a73a4.dtsi index c2be1934490b5..ac654ff45d0e9 100644 --- a/arch/arm/boot/dts/renesas/r8a73a4.dtsi +++ b/arch/arm/boot/dts/renesas/r8a73a4.dtsi @@ -711,7 +711,7 @@ mstp5_clks: mstp5_clks@e6150144 { compatible = "renesas,r8a73a4-mstp-clocks", "renesas,cpg-mstp-clocks"; reg = <0 0xe6150144 0 4>, <0 0xe615003c 0 4>; - clocks = <&extal2_clk>, <&cpg_clocks R8A73A4_CLK_HP>; + clocks = <&cp_clk>, <&cpg_clocks R8A73A4_CLK_HP>; #clock-cells = <1>; clock-indices = < R8A73A4_CLK_THERMAL R8A73A4_CLK_IIC8