From: Alex Deucher <alexander.deucher@amd.com>
Date: Fri, 26 Jul 2019 16:04:39 +0000 (-0500)
Subject: drm/amdgpu/display: fix the build without CONFIG_DRM_AMD_DC_DSC_SUPPORT
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=d3b9f39d8417ee2f2cd87b5e5410015ce6f78491;p=linux.git

drm/amdgpu/display: fix the build without CONFIG_DRM_AMD_DC_DSC_SUPPORT

Some code was missing the CONFIG_DRM_AMD_DC_DSC_SUPPORT guard.

Reviewed-by: Nicholas Kazlauskas <nicholas.kazlauskas@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
index 69e4d0d96c7f6..38b3c89b2a599 100644
--- a/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
+++ b/drivers/gpu/drm/amd/display/dc/dcn20/dcn20_hwseq.c
@@ -630,9 +630,11 @@ static void dcn20_init_hw(struct dc *dc)
 		}
 	}
 
+#ifdef CONFIG_DRM_AMD_DC_DSC_SUPPORT
 	/* Power gate DSCs */
 	for (i = 0; i < res_pool->res_cap->num_dsc; i++)
 		dcn20_dsc_pg_control(hws, res_pool->dscs[i]->inst, false);
+#endif
 
 	/* Blank pixel data with OPP DPG */
 	for (i = 0; i < dc->res_pool->timing_generator_count; i++) {