From: Annaliese McDermond Date: Thu, 4 Apr 2019 04:01:55 +0000 (-0700) Subject: ASoC: tlv320aic32x4: Add Playback PowerTune Controls X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=d3e6e374566e1154820a9a3dc82f7eef646fcf95;p=linux.git ASoC: tlv320aic32x4: Add Playback PowerTune Controls PowerTune controls the power level of the chip. On playback this indirectly controls things like the gain of the various output amplifiers. This can allow for the decrease of output levels from the codec. This adds controls for those power levels to the driver. Signed-off-by: Annaliese McDermond Signed-off-by: Mark Brown --- diff --git a/sound/soc/codecs/tlv320aic32x4.c b/sound/soc/codecs/tlv320aic32x4.c index 77df2cbdf5f41..6edee05ff9f0c 100644 --- a/sound/soc/codecs/tlv320aic32x4.c +++ b/sound/soc/codecs/tlv320aic32x4.c @@ -248,9 +248,18 @@ static const char * const lo_cm_text[] = { static SOC_ENUM_SINGLE_DECL(lo_cm_enum, AIC32X4_CMMODE, 3, lo_cm_text); +static const char * const ptm_text[] = { + "P3", "P2", "P1", +}; + +static SOC_ENUM_SINGLE_DECL(l_ptm_enum, AIC32X4_LPLAYBACK, 2, ptm_text); +static SOC_ENUM_SINGLE_DECL(r_ptm_enum, AIC32X4_RPLAYBACK, 2, ptm_text); + static const struct snd_kcontrol_new aic32x4_snd_controls[] = { SOC_DOUBLE_R_S_TLV("PCM Playback Volume", AIC32X4_LDACVOL, AIC32X4_RDACVOL, 0, -0x7f, 0x30, 7, 0, tlv_pcm), + SOC_ENUM("DAC Left Playback PowerTune Switch", l_ptm_enum), + SOC_ENUM("DAC Right Playback PowerTune Switch", r_ptm_enum), SOC_DOUBLE_R_S_TLV("HP Driver Gain Volume", AIC32X4_HPLGAIN, AIC32X4_HPRGAIN, 0, -0x6, 0x1d, 5, 0, tlv_driver_gain), diff --git a/sound/soc/codecs/tlv320aic32x4.h b/sound/soc/codecs/tlv320aic32x4.h index 88205bc971980..40734211bc0ed 100644 --- a/sound/soc/codecs/tlv320aic32x4.h +++ b/sound/soc/codecs/tlv320aic32x4.h @@ -78,6 +78,8 @@ int aic32x4_register_clocks(struct device *dev, const char *mclk_name); #define AIC32X4_PWRCFG AIC32X4_REG(1, 1) #define AIC32X4_LDOCTL AIC32X4_REG(1, 2) +#define AIC32X4_LPLAYBACK AIC32X4_REG(1, 3) +#define AIC32X4_RPLAYBACK AIC32X4_REG(1, 4) #define AIC32X4_OUTPWRCTL AIC32X4_REG(1, 9) #define AIC32X4_CMMODE AIC32X4_REG(1, 10) #define AIC32X4_HPLROUTE AIC32X4_REG(1, 12)