From: Richard Henderson <rth@twiddle.net>
Date: Fri, 27 Jun 2014 04:26:00 +0000 (-0700)
Subject: tcg/ppc: Fix failure in tcg_out_mem_long
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=d4cba13bdf251baeedb36b87c1e9f6766773e380;p=qemu.git

tcg/ppc: Fix failure in tcg_out_mem_long

With rt != r0 on loads, we use rt for scratch.  If we need an index
register different from base, we can't use rt, but r0 is usable.

Signed-off-by: Richard Henderson <rth@twiddle.net>
Message-id: 1403843160-30332-1-git-send-email-rth@twiddle.net
Tested-by: Cédric Le Goater <clg@fr.ibm.com>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
---

diff --git a/tcg/ppc/tcg-target.c b/tcg/ppc/tcg-target.c
index c83fd9fdc0..dd84e76127 100644
--- a/tcg/ppc/tcg-target.c
+++ b/tcg/ppc/tcg-target.c
@@ -805,7 +805,10 @@ static void tcg_out_mem_long(TCGContext *s, int opi, int opx, TCGReg rt,
 
     /* For unaligned, or very large offsets, use the indexed form.  */
     if (offset & align || offset != (int32_t)offset) {
-        tcg_debug_assert(rs != base && (!is_store || rs != rt));
+        if (rs == base) {
+            rs = TCG_REG_R0;
+        }
+        tcg_debug_assert(!is_store || rs != rt);
         tcg_out_movi(s, TCG_TYPE_PTR, rs, orig);
         tcg_out32(s, opx | TAB(rt, base, rs));
         return;