From: Stephen Boyd Date: Fri, 15 Feb 2019 23:59:54 +0000 (-0800) Subject: Merge tag 'tags/meson-clk-5.1' of https://github.com/BayLibre/clk-meson into clk... X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=d8c22b32a612fb7940e9d1c0068fb80fcbfe8da7;p=linux.git Merge tag 'tags/meson-clk-5.1' of https://github.com/BayLibre/clk-meson into clk-meson Pull Amlogic clk driver updates from Neil Armstrong: - add 32k clock generation for AXG - add support for the Mali GPU clocks for Meson8 - claim input clocks through DT for AXG and GXBB - rework drivers dependencies among meson clock drivers - add G12A EE clock controller driver * tag 'tags/meson-clk-5.1' of https://github.com/BayLibre/clk-meson: clk: meson: factorise meson64 peripheral clock controller drivers clk: meson: g12a: add peripheral clock controller dt-bindings: clk: meson: add g12a periph clock controller bindings clk: meson: pll: update driver for the g12a clk: meson: rework and clean drivers dependencies clk: meson: axg-audio does not require syscon clk: meson: use CONFIG_ARCH_MESON to enter meson clk directory clk: export some clk_hw function symbols for module drivers clk: meson: ao-clkc: claim clock controller input clocks from DT clk: meson: axg: claim clock controller input clock from DT clk: meson: gxbb: claim clock controller input clock from DT clk: meson: meson8b: add the GPU clock tree clk: meson: meson8b: use a separate clock table for Meson8 clk: meson: axg-ao: add 32k generation subtree clk: meson: gxbb-ao: replace cec-32k with the dual divider clk: meson: add dual divider clock driver clk: meson: clean-up clock registration dt-bindings: clk: meson: add ao slow clock path ids --- d8c22b32a612fb7940e9d1c0068fb80fcbfe8da7