From: Bhavya Kapoor Date: Tue, 30 Jan 2024 10:20:43 +0000 (+0530) Subject: arm64: dts: ti: k3-j7200-som-p0: Add support for CAN instance 0 in main domain X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=da23e8d1124b93e468a24247021ace34902a9895;p=linux.git arm64: dts: ti: k3-j7200-som-p0: Add support for CAN instance 0 in main domain CAN instance 0 in the main domain is brought on the J7200 SoM through header J1. Thus, Add transceiver dt node to add support for this CAN instance. Also, add the mux dt nodes to route CAN High and Low lines coming from the SoC to the Common Processor Board. Signed-off-by: Bhavya Kapoor Link: https://lore.kernel.org/r/20240130102044.120483-3-b-kapoor@ti.com Signed-off-by: Vignesh Raghavendra --- diff --git a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi index 228efcc170afd..1a9b414cb8e04 100644 --- a/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi +++ b/arch/arm64/boot/dts/ti/k3-j7200-som-p0.dtsi @@ -5,6 +5,8 @@ /dts-v1/; +#include + #include "k3-j7200.dtsi" / { @@ -80,6 +82,25 @@ no-map; }; }; + + mux0: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + mux-gpios = <&exp_som 1 GPIO_ACTIVE_HIGH>; + }; + + mux1: mux-controller { + compatible = "gpio-mux"; + #mux-state-cells = <1>; + mux-gpios = <&exp_som 2 GPIO_ACTIVE_HIGH>; + }; + + transceiver0: can-phy0 { + /* standby pin has been grounded by default */ + compatible = "ti,tcan1042"; + #phy-cells = <0>; + max-bitrate = <5000000>; + }; }; &wkup_pmx0 { @@ -142,6 +163,13 @@ J721E_IOPAD(0xd8, PIN_INPUT_PULLUP, 0) /* (W2) I2C0_SDA */ >; }; + + main_mcan0_pins_default: main-mcan0-default-pins { + pinctrl-single,pins = < + J721E_IOPAD(0x24, PIN_INPUT, 0) /* (V20) MCAN0_RX */ + J721E_IOPAD(0x20, PIN_OUTPUT, 0) /* (V18) MCAN0_TX */ + >; + }; }; &hbmc { @@ -478,3 +506,10 @@ }; }; }; + +&main_mcan0 { + status = "okay"; + pinctrl-0 = <&main_mcan0_pins_default>; + pinctrl-names = "default"; + phys = <&transceiver0>; +};