From: Chris Packham <chris.packham@alliedtelesis.co.nz>
Date: Thu, 26 Sep 2019 23:28:18 +0000 (+1200)
Subject: ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=da29334c751187b0bb89bdfa6c0302697848fa1a;p=linux.git

ARM: dts: armada-xp: enable L2 cache parity and ecc on db-xc3-24g4xg

Enable L2 cache parity and ECC on the db-xc3-24g4xg board so that cache
operations are protected and errors can be flagged to the EDAC
subsystem.

Signed-off-by: Chris Packham <chris.packham@alliedtelesis.co.nz>
Signed-off-by: Gregory CLEMENT <gregory.clement@bootlin.com>
---

diff --git a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
index df048050615f5..4ec0ae01b61d0 100644
--- a/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
+++ b/arch/arm/boot/dts/armada-xp-db-xc3-24g4xg.dts
@@ -33,6 +33,11 @@
 	};
 };
 
+&L2 {
+	arm,parity-enable;
+	marvell,ecc-enable;
+};
+
 &devbus_bootcs {
 	status = "okay";