From: Robin Chen Date: Mon, 20 Jun 2022 16:18:55 +0000 (+0800) Subject: drm/amd/display: Disable PSRSU when DSC enabled on the specific sink X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=e2facd575fdf13b718f6c833ed546467a3e6e3ba;p=linux.git drm/amd/display: Disable PSRSU when DSC enabled on the specific sink [Why] Some specific sink is not able to support PSRSU when DSC is turned on. For this case, fall-back to use PSR1. Reviewed-by: Anthony Koo Acked-by: Solomon Chiu Signed-off-by: Robin Chen Tested-by: Daniel Wheeler Signed-off-by: Alex Deucher --- diff --git a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c index bc239d38c3c7e..235259d6c5a16 100644 --- a/drivers/gpu/drm/amd/display/modules/power/power_helpers.c +++ b/drivers/gpu/drm/amd/display/modules/power/power_helpers.c @@ -794,33 +794,34 @@ bool dmcu_load_iram(struct dmcu *dmcu, */ bool is_psr_su_specific_panel(struct dc_link *link) { - if (link->dpcd_caps.edp_rev >= DP_EDP_14) { - if (link->dpcd_caps.psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED) - return true; + bool isPSRSUSupported = false; + struct dpcd_caps *dpcd_caps = &link->dpcd_caps; + + if (dpcd_caps->edp_rev >= DP_EDP_14) { + if (dpcd_caps->psr_info.psr_version >= DP_PSR2_WITH_Y_COORD_ET_SUPPORTED) + isPSRSUSupported = true; /* * Some panels will report PSR capabilities over additional DPCD bits. * Such panels are approved despite reporting only PSR v3, as long as * the additional bits are reported. */ - if (link->dpcd_caps.psr_info.psr_version < DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) - return false; - - if (link->dpcd_caps.sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) { + if (dpcd_caps->sink_dev_id == DP_BRANCH_DEVICE_ID_001CF8) { /* - * FIXME: * This is the temporary workaround to disable PSRSU when system turned on - * DSC function on the sepcific sink. Once the PSRSU + DSC is fixed, this - * condition should be removed. + * DSC function on the sepcific sink. */ - if (link->dpcd_caps.dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT) - return false; - - if (link->dpcd_caps.psr_info.force_psrsu_cap == 0x1) - return true; + if (dpcd_caps->psr_info.psr_version < DP_PSR2_WITH_Y_COORD_IS_SUPPORTED) + isPSRSUSupported = false; + else if (dpcd_caps->dsc_caps.dsc_basic_caps.fields.dsc_support.DSC_SUPPORT && + ((dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x08) || + (dpcd_caps->sink_dev_id_str[1] == 0x08 && dpcd_caps->sink_dev_id_str[0] == 0x07))) + isPSRSUSupported = false; + else if (dpcd_caps->psr_info.force_psrsu_cap == 0x1) + isPSRSUSupported = true; } } - return false; + return isPSRSUSupported; } /**