From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Wed, 8 Jun 2022 15:40:22 +0000 (+0200)
Subject: arm64: dts: renesas: r8a779f0: Add CPU core clocks
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=e5fba0bc8240eb3f255e1f2cd5c74ecd29363791;p=linux.git

arm64: dts: renesas: r8a779f0: Add CPU core clocks

Describe the clocks for the eight Cortex-A55 CPU cores.
CA55 Sub-System 0 (first 2 clusters / CPU cores 0-3) is clocked by Z0φ.
CA55 Sub-System 1 (last 2 clusters / CPU cores 4-7) is clocked by Z1φ.

For now no operating points are defined.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Reviewed-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Tested-by: Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>
Link: https://lore.kernel.org/r/c502087f9affa86dd665def0d990d277a51cc75c.1654701480.git.geert+renesas@glider.be
---

diff --git a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
index 8e612eb35b30f..907984d2b81e6 100644
--- a/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
+++ b/arch/arm64/boot/dts/renesas/r8a779f0.dtsi
@@ -64,6 +64,7 @@
 			next-level-cache = <&L3_CA55_0>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>;
 		};
 
 		a55_1: cpu@100 {
@@ -74,6 +75,7 @@
 			next-level-cache = <&L3_CA55_0>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>;
 		};
 
 		a55_2: cpu@10000 {
@@ -84,6 +86,7 @@
 			next-level-cache = <&L3_CA55_1>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>;
 		};
 
 		a55_3: cpu@10100 {
@@ -94,6 +97,7 @@
 			next-level-cache = <&L3_CA55_1>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z0>;
 		};
 
 		a55_4: cpu@20000 {
@@ -104,6 +108,7 @@
 			next-level-cache = <&L3_CA55_2>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>;
 		};
 
 		a55_5: cpu@20100 {
@@ -114,6 +119,7 @@
 			next-level-cache = <&L3_CA55_2>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>;
 		};
 
 		a55_6: cpu@30000 {
@@ -124,6 +130,7 @@
 			next-level-cache = <&L3_CA55_3>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>;
 		};
 
 		a55_7: cpu@30100 {
@@ -134,6 +141,7 @@
 			next-level-cache = <&L3_CA55_3>;
 			enable-method = "psci";
 			cpu-idle-states = <&CPU_SLEEP_0>;
+			clocks = <&cpg CPG_CORE R8A779F0_CLK_Z1>;
 		};
 
 		L3_CA55_0: cache-controller-0 {