From: Dmitry Osipenko Date: Sun, 14 Apr 2019 19:23:21 +0000 (+0300) Subject: clk: tegra: divider: Mark Memory Controller clock as read-only X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=e71f4d385878671991e200083c7d30eb4ca8e99a;p=linux.git clk: tegra: divider: Mark Memory Controller clock as read-only The Memory Controller (MC) clock rate can't be simply changed and nothing in kernel need to change the rate, hence let's make the clock read-only. This id also needed for the EMC driver because timing configuration may require the MC clock diver to be disabled, that is handled by the EMC clock / EMC driver integration and CLK framework shall not touch the MC divider configuration on the EMC clock rate change. Signed-off-by: Dmitry Osipenko Signed-off-by: Stephen Boyd --- diff --git a/drivers/clk/tegra/clk-divider.c b/drivers/clk/tegra/clk-divider.c index 205fe8ff63f03..2a1822a227407 100644 --- a/drivers/clk/tegra/clk-divider.c +++ b/drivers/clk/tegra/clk-divider.c @@ -175,6 +175,7 @@ struct clk *tegra_clk_register_mc(const char *name, const char *parent_name, void __iomem *reg, spinlock_t *lock) { return clk_register_divider_table(NULL, name, parent_name, - CLK_IS_CRITICAL, reg, 16, 1, 0, + CLK_IS_CRITICAL, + reg, 16, 1, CLK_DIVIDER_READ_ONLY, mc_div_table, lock); }