From: Thomas Hellström Date: Sat, 9 Dec 2023 15:18:41 +0000 (+0100) Subject: drm/xe: Restrict huge PTEs to 1GiB X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=e84d716dd461928b3db344748cd7f87395a2ce74;p=linux.git drm/xe: Restrict huge PTEs to 1GiB Add a define for the highest level for which we can encode a huge PTE, and use it for page-table building. Also update an assert that checks that we don't try to encode for larger sizes. Signed-off-by: Thomas Hellström Reviewed-by: Matthew Brost Reviewed-by: Brian Welty Link: https://patchwork.freedesktop.org/patch/msgid/20231209151843.7903-2-thomas.hellstrom@linux.intel.com Signed-off-by: Rodrigo Vivi --- diff --git a/drivers/gpu/drm/xe/xe_pt.c b/drivers/gpu/drm/xe/xe_pt.c index 3b485313804aa..46ef9df34a2e3 100644 --- a/drivers/gpu/drm/xe/xe_pt.c +++ b/drivers/gpu/drm/xe/xe_pt.c @@ -430,6 +430,9 @@ static bool xe_pt_hugepte_possible(u64 addr, u64 next, unsigned int level, { u64 size, dma; + if (level > MAX_HUGEPTE_LEVEL) + return false; + /* Does the virtual range requested cover a huge pte? */ if (!xe_pt_covers(addr, next, level, &xe_walk->base)) return false; diff --git a/drivers/gpu/drm/xe/xe_pt.h b/drivers/gpu/drm/xe/xe_pt.h index d5460e58dbbf9..ba2f3325c84de 100644 --- a/drivers/gpu/drm/xe/xe_pt.h +++ b/drivers/gpu/drm/xe/xe_pt.h @@ -18,6 +18,9 @@ struct xe_tile; struct xe_vm; struct xe_vma; +/* Largest huge pte is currently 1GiB. May become device dependent. */ +#define MAX_HUGEPTE_LEVEL 2 + #define xe_pt_write(xe, map, idx, data) \ xe_map_wr(xe, map, (idx) * sizeof(u64), u64, data) diff --git a/drivers/gpu/drm/xe/xe_vm.c b/drivers/gpu/drm/xe/xe_vm.c index 11667529e40be..d589beb99fe69 100644 --- a/drivers/gpu/drm/xe/xe_vm.c +++ b/drivers/gpu/drm/xe/xe_vm.c @@ -1258,7 +1258,7 @@ static u64 pte_encode_pat_index(struct xe_device *xe, u16 pat_index, static u64 pte_encode_ps(u32 pt_level) { - XE_WARN_ON(pt_level > 2); + XE_WARN_ON(pt_level > MAX_HUGEPTE_LEVEL); if (pt_level == 1) return XE_PDE_PS_2M;