From: Boyuan Zhang <boyuan.zhang@amd.com>
Date: Wed, 1 Jul 2020 21:57:47 +0000 (-0400)
Subject: drm/amdgpu: enable VCN3.0 PG and CG for navy_flounder
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=ebb06097ee29442461f9b3bcd745d85e6fa9996b;p=linux.git

drm/amdgpu: enable VCN3.0 PG and CG for navy_flounder

Enable VCN3.0 PG and CG for navy_flounder by setting up the flags to the ASIC

Signed-off-by: Boyuan Zhang <boyuan.zhang@amd.com>
Reviewed-by: Leo Liu <leo.liu@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
---

diff --git a/drivers/gpu/drm/amd/amdgpu/nv.c b/drivers/gpu/drm/amd/amdgpu/nv.c
index 5e03e3c59aae3..13efe87c7a75e 100644
--- a/drivers/gpu/drm/amd/amdgpu/nv.c
+++ b/drivers/gpu/drm/amd/amdgpu/nv.c
@@ -775,8 +775,8 @@ static int nv_common_early_init(void *handle)
 		adev->external_rev_id = adev->rev_id + 0x28;
 		break;
 	case CHIP_NAVY_FLOUNDER:
-		adev->cg_flags = 0;
-		adev->pg_flags = 0;
+		adev->cg_flags = AMD_CG_SUPPORT_VCN_MGCG;
+		adev->pg_flags = AMD_PG_SUPPORT_VCN;
 		adev->external_rev_id = adev->rev_id + 0x32;
 		break;