From: Andrew Lunn <andrew@lunn.ch>
Date: Fri, 8 Feb 2019 21:25:44 +0000 (+0100)
Subject: net: dsa: mv88e6xxx: SERDES support 2500BaseT via external PHY
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=ec26016b953778c1727040adb98a0132b9162334;p=linux.git

net: dsa: mv88e6xxx: SERDES support 2500BaseT via external PHY

By using an external PHY, ports 9 and 10 can support 2500BaseT.
So set this link mode in the mask when validating.

Signed-off-by: Andrew Lunn <andrew@lunn.ch>
Signed-off-by: Heiner Kallweit <hkallweit1@gmail.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
---

diff --git a/drivers/net/dsa/mv88e6xxx/chip.c b/drivers/net/dsa/mv88e6xxx/chip.c
index 669a7f13fdce4..39c7803637640 100644
--- a/drivers/net/dsa/mv88e6xxx/chip.c
+++ b/drivers/net/dsa/mv88e6xxx/chip.c
@@ -647,8 +647,10 @@ static void mv88e6390_phylink_validate(struct mv88e6xxx_chip *chip, int port,
 				       unsigned long *mask,
 				       struct phylink_link_state *state)
 {
-	if (port >= 9)
+	if (port >= 9) {
 		phylink_set(mask, 2500baseX_Full);
+		phylink_set(mask, 2500baseT_Full);
+	}
 
 	/* No ethtool bits for 200Mbps */
 	phylink_set(mask, 1000baseT_Full);