From: Cédric Le Goater Date: Fri, 1 Dec 2017 16:06:01 +0000 (+0100) Subject: ppc/xics: assign of the CPU 'intc' pointer under the core X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=ed0c37eedfdb953d61d1e0a41439cd404e914d9d;p=qemu.git ppc/xics: assign of the CPU 'intc' pointer under the core The 'intc' pointer of the CPU references the interrupt presenter in the XICS interrupt mode. When the XIVE interrupt mode is available and activated, the machine will need to reassign this pointer to reflect the change. Moving this assignment under the realize routine of the CPU will ease the process when the interrupt mode is toggled. Signed-off-by: Cédric Le Goater Reviewed-by: David Gibson Reviewed-by: Greg Kurz Signed-off-by: David Gibson --- diff --git a/hw/intc/xics.c b/hw/intc/xics.c index bfc6b5bb23..700f6baa13 100644 --- a/hw/intc/xics.c +++ b/hw/intc/xics.c @@ -334,7 +334,6 @@ static void icp_realize(DeviceState *dev, Error **errp) } cpu = POWERPC_CPU(obj); - cpu->intc = OBJECT(icp); icp->cs = CPU(obj); env = &cpu->env; diff --git a/hw/ppc/pnv_core.c b/hw/ppc/pnv_core.c index 8d966e0802..03317db853 100644 --- a/hw/ppc/pnv_core.c +++ b/hw/ppc/pnv_core.c @@ -133,7 +133,7 @@ static void pnv_core_realize_child(Object *child, XICSFabric *xi, Error **errp) return; } - icp_create(child, TYPE_PNV_ICP, xi, &local_err); + cpu->intc = icp_create(child, TYPE_PNV_ICP, xi, &local_err); if (local_err) { error_propagate(errp, local_err); return; diff --git a/hw/ppc/spapr_cpu_core.c b/hw/ppc/spapr_cpu_core.c index 70e757f808..032438b9ce 100644 --- a/hw/ppc/spapr_cpu_core.c +++ b/hw/ppc/spapr_cpu_core.c @@ -121,7 +121,8 @@ static void spapr_cpu_core_realize_child(Object *child, goto error; } - icp_create(child, spapr->icp_type, XICS_FABRIC(spapr), &local_err); + cpu->intc = icp_create(child, spapr->icp_type, XICS_FABRIC(spapr), + &local_err); if (local_err) { goto error; }