From: Richard Henderson <richard.henderson@linaro.org>
Date: Mon, 22 Nov 2021 07:53:05 +0000 (+0100)
Subject: Merge tag 'pull-riscv-to-apply-20211122' of github.com:alistair23/qemu into staging
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=edf1aa8d44d5070828ac10c5b82dbc6caf29e7d3;p=qemu.git

Merge tag 'pull-riscv-to-apply-20211122' of github.com:alistair23/qemu into staging

Seventh RISC-V PR for QEMU 6.2

 - Deprecate IF_NONE for SiFive OTP
 - Don't reset SiFive OTP content

# gpg: Signature made Mon 22 Nov 2021 07:51:24 AM CET
# gpg:                using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054
# gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full]

* tag 'pull-riscv-to-apply-20211122' of github.com:alistair23/qemu:
  hw/misc/sifive_u_otp: Do not reset OTP content on hardware reset
  hw/misc/sifive_u_otp: Use IF_PFLASH for the OTP device instead of IF_NONE

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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