From: Pierre-Louis Bossart Date: Fri, 2 Jun 2023 20:22:12 +0000 (-0500) Subject: ASoC: Intel: soc-acpi: add table for RPL Dell SKU 0BDA X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=eeb9f9f7e59d75c97909c3bd51574191d205765a;p=linux.git ASoC: Intel: soc-acpi: add table for RPL Dell SKU 0BDA This is a standard configuration we've seen before for TGL. Closes: https://github.com/thesofproject/linux/issues/4380 Reviewed-by: Bard Liao Reviewed-by: Ranjani Sridharan Signed-off-by: Pierre-Louis Bossart Link: https://lore.kernel.org/r/20230602202225.249209-16-pierre-louis.bossart@linux.intel.com Signed-off-by: Mark Brown --- diff --git a/sound/soc/intel/common/soc-acpi-intel-rpl-match.c b/sound/soc/intel/common/soc-acpi-intel-rpl-match.c index c61d654eb1e21..4dc9ba70f481e 100644 --- a/sound/soc/intel/common/soc-acpi-intel-rpl-match.c +++ b/sound/soc/intel/common/soc-acpi-intel-rpl-match.c @@ -179,6 +179,30 @@ static const struct snd_soc_acpi_link_adr rpl_sdca_3_in_1[] = { {} }; +static const struct snd_soc_acpi_link_adr rpl_sdw_rt711_link0_rt1316_link12_rt714_link3[] = { + { + .mask = BIT(0), + .num_adr = ARRAY_SIZE(rt711_sdca_0_adr), + .adr_d = rt711_sdca_0_adr, + }, + { + .mask = BIT(1), + .num_adr = ARRAY_SIZE(rt1316_1_group1_adr), + .adr_d = rt1316_1_group1_adr, + }, + { + .mask = BIT(2), + .num_adr = ARRAY_SIZE(rt1316_2_group1_adr), + .adr_d = rt1316_2_group1_adr, + }, + { + .mask = BIT(3), + .num_adr = ARRAY_SIZE(rt714_3_adr), + .adr_d = rt714_3_adr, + }, + {} +}; + static const struct snd_soc_acpi_link_adr rpl_sdw_rt711_link2_rt1316_link01_rt714_link3[] = { { .mask = BIT(2), @@ -341,6 +365,12 @@ struct snd_soc_acpi_mach snd_soc_acpi_intel_rpl_sdw_machines[] = { .drv_name = "sof_sdw", .sof_tplg_filename = "sof-rpl-rt711-l2-rt1316-l01-rt714-l3.tplg", }, + { + .link_mask = 0xF, /* 4 active links required */ + .links = rpl_sdw_rt711_link0_rt1316_link12_rt714_link3, + .drv_name = "sof_sdw", + .sof_tplg_filename = "sof-rpl-rt711-l0-rt1316-l12-rt714-l3.tplg", + }, { .link_mask = 0xF, /* 4 active links required */ .links = rpl_sdw_rt711_link0_rt1318_link12_rt714_link3,