From: Geert Uytterhoeven <geert+renesas@glider.be>
Date: Wed, 15 May 2024 14:03:35 +0000 (+0100)
Subject: ARM: 9398/1: Fix userspace enter on LPAE with CC_OPTIMIZE_FOR_SIZE=y
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=eebadafc3b14d9426fa9cc3ab0da0e48367c7114;p=linux.git

ARM: 9398/1: Fix userspace enter on LPAE with CC_OPTIMIZE_FOR_SIZE=y

Booting an LPAE-enabled kernel built with CONFIG_CC_OPTIMIZE_FOR_SIZE=y
fails when starting userspace:

    Kernel panic - not syncing: Attempted to kill init! exitcode=0x00000004
    CPU: 1 PID: 1 Comm: init Tainted: G        W        N 6.9.0-rc1-koelsch-00004-g7af5b901e847 #1930
    Hardware name: Generic R-Car Gen2 (Flattened Device Tree)
    Call trace:
     unwind_backtrace from show_stack+0x10/0x14
     show_stack from dump_stack_lvl+0x78/0xa8
     dump_stack_lvl from panic+0x118/0x398
     panic from do_exit+0x1ec/0x938
     do_exit from sys_exit_group+0x0/0x10
    ---[ end Kernel panic - not syncing: Attempted to kill init!  exitcode=0x00000004 ]---

Add the missing memory clobber to cpu_set_ttbcr(), as suggested by
Russell King.

Force inlining of uaccess_save_and_enable(), as suggested by Ard
Biesheuvel.

The latter fixes booting on Koelsch.

Closes: https://lore.kernel.org/r/CAMuHMdWTAJcZ9BReWNhpmsgkOzQxLNb5OhNYxzxv6D5TSh2fwQ@mail.gmail.com/

Fixes: 7af5b901e84743c6 ("ARM: 9358/2: Implement PAN for LPAE by TTBR0 page table walks disablement")
Acked-by: Ard Biesheuvel <ardb@kernel.org>
Reviewed-by: Linus Walleij <linus.walleij@linaro.org>
Tested-by: Florian Fainelli <florian.fainelli@broadcom.com>
Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Signed-off-by: Russell King (Oracle) <rmk+kernel@armlinux.org.uk>
---

diff --git a/arch/arm/include/asm/proc-fns.h b/arch/arm/include/asm/proc-fns.h
index 9b3105a2a5e06..b4986a23d8528 100644
--- a/arch/arm/include/asm/proc-fns.h
+++ b/arch/arm/include/asm/proc-fns.h
@@ -187,7 +187,7 @@ static inline unsigned int cpu_get_ttbcr(void)
 
 static inline void cpu_set_ttbcr(unsigned int ttbcr)
 {
-	asm("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr));
+	asm volatile("mcr p15, 0, %0, c2, c0, 2" : : "r" (ttbcr) : "memory");
 }
 
 #else	/*!CONFIG_MMU */
diff --git a/arch/arm/include/asm/uaccess.h b/arch/arm/include/asm/uaccess.h
index 25d21d7d6e3ef..6c9c16d767cfd 100644
--- a/arch/arm/include/asm/uaccess.h
+++ b/arch/arm/include/asm/uaccess.h
@@ -47,7 +47,7 @@ static __always_inline void uaccess_restore(unsigned int flags)
 
 #elif defined(CONFIG_CPU_TTBR0_PAN)
 
-static inline unsigned int uaccess_save_and_enable(void)
+static __always_inline unsigned int uaccess_save_and_enable(void)
 {
 	unsigned int old_ttbcr = cpu_get_ttbcr();