From: Bin Meng <bmeng.cn@gmail.com>
Date: Fri, 6 Sep 2019 16:20:07 +0000 (-0700)
Subject: riscv: sifive_u: Update PLIC hart topology configuration string
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=ef965ce23956a9e5cde5c9e91081484ec68a4139;p=qemu.git

riscv: sifive_u: Update PLIC hart topology configuration string

With heterogeneous harts config, the PLIC hart topology configuration
string are "M,MS,.." because of the monitor hart #0.

Suggested-by: Fabien Chouteau <chouteau@adacore.com>
Signed-off-by: Bin Meng <bmeng.cn@gmail.com>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Palmer Dabbelt <palmer@sifive.com>
---

diff --git a/hw/riscv/sifive_u.c b/hw/riscv/sifive_u.c
index 7fc126bc06..d80b203cc1 100644
--- a/hw/riscv/sifive_u.c
+++ b/hw/riscv/sifive_u.c
@@ -424,10 +424,11 @@ static void riscv_sifive_u_soc_realize(DeviceState *dev, Error **errp)
     plic_hart_config = g_malloc0(plic_hart_config_len);
     for (i = 0; i < ms->smp.cpus; i++) {
         if (i != 0) {
-            strncat(plic_hart_config, ",", plic_hart_config_len);
+            strncat(plic_hart_config, "," SIFIVE_U_PLIC_HART_CONFIG,
+                    plic_hart_config_len);
+        } else {
+            strncat(plic_hart_config, "M", plic_hart_config_len);
         }
-        strncat(plic_hart_config, SIFIVE_U_PLIC_HART_CONFIG,
-                plic_hart_config_len);
         plic_hart_config_len -= (strlen(SIFIVE_U_PLIC_HART_CONFIG) + 1);
     }