From: Peter Crosthwaite <crosthwaitepeter@gmail.com>
Date: Wed, 24 Jun 2015 03:57:36 +0000 (-0700)
Subject: disas: microblaze: QOMify target specific disas setup
X-Git-Url: http://git.maquefel.me/?a=commitdiff_plain;h=efc6674be845e40d443b62e80eb9ea9a9adfee3c;p=qemu.git

disas: microblaze: QOMify target specific disas setup

Move the target_disas() MB specifics to the QOM disas_set_info hook
and delete the MB specific code in disas.c.

This also now adds support for monitor_disas() to Microblaze.

E.g.
(qemu) xp 0x90000000
0000000090000000: 0x94208001

And before this patch:
(qemu) xp/i 0x90000000
0x90000000: Asm output not supported on this arch

After:
(qemu) xp/i 0x90000000
0x90000000:  mfs    r1, rmsr

Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
Signed-off-by: Peter Crosthwaite <crosthwaite.peter@gmail.com>
Signed-off-by: Andreas Färber <afaerber@suse.de>
---

diff --git a/disas.c b/disas.c
index fde5029ba5..937e08b743 100644
--- a/disas.c
+++ b/disas.c
@@ -268,9 +268,6 @@ void target_disas(FILE *out, CPUState *cpu, target_ulong code,
 #elif defined(TARGET_S390X)
     s.info.mach = bfd_mach_s390_64;
     s.info.print_insn = print_insn_s390;
-#elif defined(TARGET_MICROBLAZE)
-    s.info.mach = bfd_arch_microblaze;
-    s.info.print_insn = print_insn_microblaze;
 #elif defined(TARGET_MOXIE)
     s.info.mach = bfd_arch_moxie;
     s.info.print_insn = print_insn_moxie;
diff --git a/target-microblaze/cpu.c b/target-microblaze/cpu.c
index 128d0320d4..9ac509af3e 100644
--- a/target-microblaze/cpu.c
+++ b/target-microblaze/cpu.c
@@ -119,6 +119,12 @@ static void mb_cpu_reset(CPUState *s)
 #endif
 }
 
+static void mb_disas_set_info(CPUState *cpu, disassemble_info *info)
+{
+    info->mach = bfd_arch_microblaze;
+    info->print_insn = print_insn_microblaze;
+}
+
 static void mb_cpu_realizefn(DeviceState *dev, Error **errp)
 {
     CPUState *cs = CPU(dev);
@@ -256,6 +262,8 @@ static void mb_cpu_class_init(ObjectClass *oc, void *data)
     dc->vmsd = &vmstate_mb_cpu;
     dc->props = mb_properties;
     cc->gdb_num_core_regs = 32 + 5;
+
+    cc->disas_set_info = mb_disas_set_info;
 }
 
 static const TypeInfo mb_cpu_type_info = {